JSZ2698

Smart Hearing-Aid Audio Module4.0×3.0×1.0 mm · bottom port · Bottom-port

Smart Hearing Module24-bit DSP8-ch WDRC1.5–2 mo battery

The JSZ2698 integrates an acoustic sensing element, a front-end amplifier/bias stage and a 24-bit DSP in one device — a complete chain from pickup and pre-amp to digital audio processing and a differential driver that feeds the receiver directly. A hearing aid or PSAP needs only a battery, a receiver and buttons around it. Powered by a single zinc-air button cell at ~0.9 mA total. Offered as BAVC (analog volume) and BDVC (digital volume).

Total supply current: 0.9mA @1.3V
Receiver drive: 30mA / 20Ω
Output dynamic range: 95 dB
Package (bottom port): LGA 4030 · Bottom Port

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Key Features

Six capabilities built for the voice chainWhy JSZ2698

Full chain, one device

Pickup, pre-amp, DSP and class-D driver closed in a single package — replacing the analog-front-end + DSP + amp split, shortening the analog path and cutting noise coupling.

8-ch WDRC

24-bit audio DSP with up to 8-channel WDRC, adaptive noise reduction and feedback cancellation, 8-band GEQ and 4 biquad IIRs.

Direct-driven receiver

Zero-bias class-D differential output drives balanced-armature or dynamic receivers directly: 30 mA / 20 Ω / 95 dB DR — no external amp or coupling caps.

One button cell

Runs straight off a 1.0–1.5 V zinc-air cell with internal LDOs and a 3.3 V charge pump; a size-675 cell lasts ~1.5–2 months at 12 h/day.

3 modes, memory

Up to 3 programs cycled by one button (INT3n); volume and mode survive power-off, with key-tone feedback.

I2C provisioning

A 256 kb on-chip EEPROM is programmed over I2C (400 kbps) — firmware and WDRC fitting to the user's audiogram.

Datasheet · Typical

Full SpecificationsSpecifications

Audio Input Path

Input

PGA gain	-6 ~ +30 dB (3 dB steps, 13)
Input dynamic range	91 / 92 dB
Input-referred noise	-110.4 / -108 dBV
THD	1 % (VIN=-40 dBV)
Audio BW / sample rate	8 kHz / 16 kHz
Input impedance	2 MΩ

Audio Output Path

Output

Output current	30 mA
Output impedance	20 Ω
Output dynamic range	92 / 95 dB
Output THD	1 % (-30 dB out)
Receiver	Balanced armature / dynamic, zero-bias differential

Power

Battery supply VB	1.0 – 1.5 V (max 1.7 V)
Absolute max	1.8 V
Total supply (full function)	≈0.9 mA (DSP 780 µA + mic 125 µA @1.3 V)
Total power	≈1.2 mW
Charge pump	3.3 V / ≤3.5 mA
Internal LDOs	AVDD/DVDD 0.9–1.05 V
Max dissipation	20 mW

DSP & Interface

DSP

Core	24-bit audio DSP (ASIP + accelerators)
WDRC / AGC	Up to 8 channels, adaptive AGC
EQ & filters	8-band GEQ · 4 biquads
ANC / feedback	Adaptive
Memory / programming	256 kb EEPROM · I2C 400 kbps
ESD (HBM)	±2 kV

Package & Battery

Package

Package	LGA 4030 · 4.0 × 3.0 × 1.0 mm lid
Port	Bottom · Ø0.65 mm
Size 10 / 312	≈1 wk / ≈1.5–2 wk (12 h/day)
Size 13 / 675	≈3–4 wk / ≈1.5–2 mo (12 h/day)
Operating / storage	-10 ~ +60 °C / -40 ~ +70 °C

Typical values at 25 C in the reference circuit; series production follows the official datasheet.

Pin Configuration

Pin DefinitionsPin Definitions

Pin	Name	Description
1	VB	PWR · Battery input 1.0-1.5 V (zinc-air / single rechargeable cell)
2	GND	GND · System ground, reference for all signals
3	PAOUT1	O · Class-D differential output +, direct receiver drive
4	PAOUT2	O · Class-D differential output -, direct receiver drive
5	SDA	I/O · I2C data (EEPROM programming)
6	SCL	I/O · I2C clock
7	RSTn	I · Chip reset (active low)
8	VC+	I · Digital volume up key - BDVC only
9	VC−	I · Digital volume down key - BDVC only
10	VC_L	I · Analog volume wiper, external potentiometer (top to AVDD) - BAVC only
11	INT3n	I · Program switch (falling edge)
12	AVDD	O · 1 V LDO analog output, 0.1 uF decoupling - BAVC only

Pin numbering per final package drawing; parallel 2–3 pins each for VB/GND for class-D peak current; keep copper and traces clear under the acoustic port.

Applications